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🏛 MiniMax

1 paper across 1 session

Poster Session 2

1 paper
Wednesday, December 3, 2025 · 4:30 PM → 7:30 PM
Exhibit Hall C,D,E
SynLogic: Synthesizing Verifiable Reasoning Data at Scale for Learning Logical Reasoning and Beyond
#1814 · Junteng Liu, Yuanxiang Fan, Jiang Zhuo, Han Ding, Yongyi Hu, Chi Zhang, Yiqi Shi, Shitong Weng, Aili Chen, Shiqi Chen, Mozhi Zhang, Pengyu Zhao, Junxian He

We present SynLogic: a data synthesis framework and logical reasoning dataset encompassing 35 tasks.